module baudcontroller (
	clk,	// clock
	rst,	// reset
	clkout	// baud rate output
);

input clk;
input rst;
output clkout;
reg clkout;

parameter baudrate = 9600;

always_init
  case baudrate
  	115200: clkdiv = 7;
  	57600:	clkdiv = 15;
  	38400:	clkdiv = 23;
  	19200:	clkdiv = 47;
  	9600:	clkdiv = 95;
  	4800:	clkdiv = 191;
  	2400:	clkdiv = 383;
  	1200:	clkdiv = 767;	


				when "000" => clkdiv <= 7; -- 115200
				when "001" => clkdiv <= 15; -- 57600
				when "010" => clkdiv <= 23; -- 38400
				when "011" => clkdiv <= 47; -- 19200
				when "100" => clkdiv <= 95; -- 9600
				when "101" => clkdiv <= 191; -- 4800
				when "110" => clkdiv <= 383; -- 2400
				when "111" => clkdiv <= 767; -- 1200
				when others => clkdiv <= 7; 
  
    always @(CharIn)
    case (CharIn)
      4'h0: HexOut = 7'b1000000;
      4'h1: HexOut = 7'b1111001;
      4'h2: HexOut = 7'b0100100;
      4'h3: HexOut = 7'b0110000;
      4'h4: HexOut = 7'b0011001;
      4'h5: HexOut = 7'b0010010;
      4'h6: HexOut = 7'b0000010;
      4'h7: HexOut = 7'b1111000;
      4'h8: HexOut = 7'b0000000;
      4'h9: HexOut = 7'b0011000;
      4'hA: HexOut = 7'b0001000;
      4'hB: HexOut = 7'b0000011;
      4'hC: HexOut = 7'b1000110;
      4'hD: HexOut = 7'b0100001;
      4'hE: HexOut = 7'b0000110;
      4'hF: HexOut = 7'b0001110;
      default: HexOut = 7'b0110110;
    endcase

architecture simple of baudcontroller is
   	signal clkdiv : integer := 0;
		signal count : integer := 0;
begin
	div: process (rst, clk)
	begin
		if rst='0' then
			clkdiv <= 0;
			count <= 0;
		elsif rising_edge(clk) then
			case baud is
				when "000" => clkdiv <= 7; -- 115200
				when "001" => clkdiv <= 15; -- 57600
				when "010" => clkdiv <= 23; -- 38400
				when "011" => clkdiv <= 47; -- 19200
				when "100" => clkdiv <= 95; -- 9600
				when "101" => clkdiv <= 191; -- 4800
				when "110" => clkdiv <= 383; -- 2400
				when "111" => clkdiv <= 767; -- 1200
				when others => clkdiv <= 7; 
			end case;
		end if;
	end process; 

	clockdivision: process (clk, rst)
	begin
		if rst='0' then
			clkdiv <= 0;
			count <= 0;
		elsif rising_edge(clk) then
			count <= count + 1;
			if (count > clkdiv) then
				clkout <= not clkout;
				count <= 0;
			end if;
		end if;		
	end process;
end simple;